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  • X ≠ 2017
  • X ≠ Acosta, Marcial Garcia
  • X = Spring 2018
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An efficient and reconfigurable hardware architecture for narrow bandwidth low-pass and polyphase recursive filters
E E 653 Coding Theory
COMPE 160 Introduction to Computer Programming
E E 210 Circuit Analysis I, section 01
COMPE 270 Digital Systems
A closed loop brain computer interface system: Hardware implementation
E E 665 Multimedia Wireless Networks
COMPE 561 Windows Database and Web Programming
E E 530 Analog Integrated Circuit Design
E E 204 Principles of Electrical Engineering
E E 410 Signals and Systems
E E 420 Feedback Control Systems
Ambient sensor based vital sign monitoring system
E E 430 Analysis and Design of Electronic Circuits
A real time closed loop brain computer interface system
Design and implementation of unequal error protection scheme for wireless fading channels using LDPC codes for HEVC bitstream
E E 496L Control Systems Laboratory
E E 380 Electrical Energy Conversion
E E 652 Principles and Applications of Information Theory
E E 340 Electric and Magnetic Fields

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