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Description
Implementation optimization is one of the major issues in today's world of technology. The optimization task includes reduction in integrated circuit area, reduction in power consumption and reduction in computational workload. Multirate filtering techniques is used to process signals with large ratio of sample rate to bandwidth. The design embeds a sample rate reduction at the input port and a corresponding sample rate increase at the output port. The overall filtering process is divided into two or more pairs of M-path polyphase filters which perform the input and output sample rate changes. This implementation enables the designer to satisfy the filter performance requirements and constraints while realizing significant reductions in computational processing load. The filter design maintains the standard relationship between coefficient bit precision and spectral stop band attenuation. There is a commensurate reduction in computation noise due to quantization of internal intermediate state variables. In this thesis, computational saving is realized by performing the filtering operation as a three stage process, an outer preprocessing stage, an inner filter that performs the desired bandwidth reduction, and an outer post processing stage. In the first process we use an M-path down sampling filter to reduce the bandwidth M-to-1 and to simultaneously reduce the sample rate by M-to-1 ratio. The inner stage filter operating at the reduced sample rate, fs/M has a length N/M, where N is the length of the original prototype filter. The third stage filter, another M-path filter performs the dual operation of the first stage. It performs a 1-to-M up sampling to return the sample rate to its original input rate. This process is nested and can have more than one down sampling and up sampling stage. The inner filter bandwidth reducing stage can be a single stage or another M-path filter. The filter cascade can be realized as a mix of recursive and non-recursive filters. This option offers additional arithmetic workload reduction. We limit this study to filters that exhibit linear phase or near linear phase. The study presents a number of possible implementation options with reduced workload.
